It is well known in the art for an integrated circuit device to include a power on reset (POR) circuit. The POR circuit is an indispensable component of many integrated circuit devices, such as system on chip (SoC) devices. The POR circuit functions to provide a reset signal to the digital state machine of the SoC during power up and supply brown out conditions. As a result, the digital state machine of the SoC starts and operates in a controlled manner.
It is also known in the art for an integrated circuit device to include one or more voltage monitor circuits. Such circuits function to monitor the supply voltage and provide information indicative of supply voltage conditions. For example, over-voltage and under-voltage conditions could be monitored. The integrated circuit may include power management circuits which respond to the supply voltage condition information provided by the voltage monitor circuits and act in response thereto to correct circuit operation, protect the circuit from damage and/or reset operation of the circuit to a known, safe state.
For testing purposes, the POR circuit and any unmaskable voltage monitor circuits are implicitly tested during power ramp-up when the integrated circuit comes out of reset and begins working properly. There is no satisfactory method, however, for explicitly testing the POR circuit and any unmaskable voltage monitor circuits during power ramp-down because the device is reset relative to the operating voltage thresholds of the circuits.
There is a need in the art to provide for explicit testing of such circuits.